Memory Management: Paged and Segmented Memory Organizations

Pure paging

Summary

The paging scheme we have discussed makes it possible for different size processes to be allocated and deallocated memory without external fragmentation and compaction problems. It does lead, however, to some internal fragmentation. Hardware requirements consist of a mapping unit that either

1. Contains a set of base registers - one per logical page.

   or

2. Contains a pointer to the beginning of an in-memory page table. To avoid undue processor slow downs, such a mapping unit also contains a translation look-aside buffer to store the most recently used page table entries, on the assumption that they will be soon used again.